1. Design for front-end signal processing of sensor:
Embedded 24-bit Sigma-Delta A/D Converter.
AVDD’s driving capability is about 10mA.
Two clock source options: external X’TAL or internal RC OSC.
2. Operation range:
Supply voltage range: 2.4 to 3.6V.
Operation current consumption:
(i) Normal operation: 1.5 mA (ADC clock frequency is 81.92 kHz and conversion rate is 10 Hz).
(ii) Low power operation: <1 mA (VBG: external in and <1.2V or setting tune-I
registers, IBAS[1:0] ).
3. 24-bit Sigma-Delta ADC:
Embedded 3 differential input channels.
Built-in PGIA, with gain options : 1X, 2X, 4X, 8X, 16X, 32X, 64X, 128X.
PD-PGIA mechanism, with gain options: 1X, 2X, 4X.
Conversion rate is 10 SPS when ADC clock frequency is 81.92 kHz. It could be tuned
by frequency-divider registers, OSCD[2:0]. (50 Hz/60 Hz rejection function works
while ADC clock frequency is 81.92 kHz).
RMS noise is 140 nV at 10 SPS conversion rate, PGA gain option is 128X.
ENOB is 17.5 bits. (Gain=128X, REFP=1.65V, VDDO=3.3V, OSR=8192)
Tunable internal bias current : Ibias, Iabias, Ibfbias.
Tunable Over Sampling Rate (OSR) : 1024, 2048, 4096 and 8192.
4. Built-in LDO (ENBGR=1) for AVDD and DVDD out:
AVDD out is 2.4V/2.6V/2.9V.
DVDD out is 2.2V/2.4V/2.6V.
5. Temperature sensor precision +/-3°C (after calibration).